NI PCI-7813 ອຸ​ປະ​ກອນ I/O Reconfigurable Digital (Virtex-II 3M, 160-Ch, DRAM-0MB)

Bus Connector: PCI

FPGA: Virtex-II 3M

Number of Bidirectional Digital Channels: 160

Number of External Clock Inputs: 0

Maximum Clock Rate: 40 MHz

Digital I/O Logic Levels: 3.3 V 5 V

Dynamic RAM (DRAM): 0 MB

Configures digital lines as inputs, outputs, counters/timers, or custom communication protocols using FPGA-based logic.

The Digital Reconfigurable I/O (RIO) Device features user-programmable FPGA for onboard processing and flexible I/O operation. You have complete control over the synchronization and timing of all signals and operations along with custom onboard decision-making that executes with hardware-timed speed and reliability. You can configure user-defined hardware for a wide variety of applications, such as custom digital DAQ, high-speed waveform generation, sensor simulation, hardware-in-the-loop (HIL) test, custom digital communications protocols, bit error rate testing, and other applications that require precise timing and control.

Datasheet