Terasic マルチメディアHSMCカード（フェーズアウト）

Terasic Multimedia Touch Panel Daughter Board (MTDB)
        Color LCD touch-screen display
            800 x 480 resolution
        24-bit CD-quality Audio CODEC with line-in, line-out, and microphone-in jacks
        10/100 Ethernet physical layer/media access control (PHY/MAC)
        Connectors
            VGA output
            Composite TV-in
            Audio-out, audio-in, and microphone-in
            4-bit Secure digital (SD) card
            Serial connector (RS-232 DB9 port)
            PS/2
            Ethernet connector (RJ-45)
            8-pin debug I/O
        Size：125*100 mm
    Cables and accessories
        128-Mbyte SD card and USB-to-SD card adapter
        Ethernet (RJ-45) cable (7 ft.),Ethernet crossover adapter
    Nios II Evaluation Kit CD-ROM
        Example applications
            Application selector
            Picture viewer
            Mandelbrot acceleration with the Nios C2H compiler
            Web server/Remote FPGA configuration
        Hardware tutorials
            Create an FPGA design in one hour
            Build a 32-bit soft processor system inside an FPGA
        Software tutorials
            My First Software Application
        Complete documentation
            Quick start guide
            User guide
            Reference manual
            Board schematic, layout, and bill of materials
            Product and partner information
    Altera Complete Design Suite DVD (Free):
        Quartus® II Web Edition (FPGA design software)
        (We provide Quartus II Web Edition software. To learn more about the details please visit Quartus II Software—Subscription Edition and Web Edition Comparison )
        ModelSim®-Altera Web Edition (FPGA simulation software from ModelSim)
        Nios II Embedded Design Suite (32-bit microprocessor software)
        MicroC/OS-II real-time operating system evaluation
        Nios II C-to-Hardware acceleration compiler evaluation
        NicheStack TCP/IP Network Stack - Nios II Edition evaluation
        SD/MMC SPI IP Core evaluation licensing avaliable through El Camino
        MegaCore® IP Library (Library of intellectual property cores)

Catalog

The NEEK upgrade package is perfectly for users who have Cyclone III FPGA Starter Kit to upgrade their Cyclone III Starter boards into a Nios II Embedded Evaluation Kit, Cyclone III Edition . This kit is a first-class, low-cost evaluation platform for embedded developers. Software developers, especially those new to FPGA design, can install and evaluate the Nios II Embedded Design Suite—a comprehensive software development suite for embedded applications—all at no cost. The included software tutorials and design examples also come with full source code showing applications such as Picture Viewer, Web Server, C-to-Hardware (C2H) acceleration and graphics.

The quality of the NEEK upgrade package is as high as Altera's Nios II Embedded Evaluation Kit, Cyclone III Edition designed and produced by Terasic Technologies. Having the NEEK upgrade package, users are able to connect the LCD multimedia daughter board directly to the Cyclone III FPGA Starter Board without using a cable (Please refer to the picture below).